NXP Semiconductors /LPC408x_7x /EMC /CONTROL

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Interpret as CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)E0 (NORMAL)M0 (WARMRESET)L0RESERVED

E=DISABLED, M=NORMAL, L=WARMRESET

Description

Controls operation of the memory controller.

Fields

E

EMC Enable. Indicates if the EMC is enabled or disabled:

0 (DISABLED): Disabled

1 (ENABLED): Enabled (POR and warm reset value).

M

Address mirror. Indicates normal or reset memory map:

0 (NORMAL): Normal memory map.

1 (RESET): Reset memory map. Static memory EMC_CS1 is mirrored onto EMC_CS0 and EMC_DYCS0 (POR reset value).

L

Low-power mode. Indicates normal, or low-power mode:

0 (WARMRESET): Normal mode (warm reset value).

1 (LOWPOWER): Low-power mode. Entering low-power mode reduces memory controller power consumption. Dynamic memory is refreshed as necessary. The memory controller returns to normal functional mode by clearing the low-power mode bit (L), or by POR. This bit must only be modified when the EMC is in idle state.[1]

RESERVED

Reserved. Read value is undefined, only zero should be written.

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